01 · Focus

Engineering direction

My current foundation is analog IC and power management, extending into mixed-signal integration, with RFIC capability developing through the LNA project.

Analog IC

Using biasing, feedback, stability, and transient response as core analysis foundations.

Power Management

Studying LDO/DLDO compensation, load transients, digital control, and physical parasitic effects.

Mixed-Signal

Building integration experience across analog front ends, dynamic comparators, and digital-control interfaces.

RFIC

A developing area supported by continuing work in matching, noise, linearity, and stability analysis.

02 · Method

How I approach engineering work

Project records emphasize verifiable scope and do not combine different simulation levels or incomplete work into broader claims.

  1. Define design targets, test conditions, and the verification boundary for the current phase.
  2. Interpret nominal, PVT, and Monte Carlo results separately.
  3. Distinguish standalone blocks from integrated results instead of extending local passes to system-level claims.
  4. Trace failure patterns through the testbench and circuit interactions to identify root causes.
  5. Retain unmet specifications, data limitations, and the next redesign focus.
  6. Label results as simulation and never present them as silicon measurement.

03 · Next

Current objective

Deepen my analog IC and PMIC design foundation while extending mixed-signal experience through data-converter work and strengthening the workflow from schematic and variation analysis to post-layout comparison.

Prepare for U.S. EE/ECE graduate study and further develop integrated-circuit design and verification capability.

Skills

Skills snapshot

A concise summary supported by the current public projects and profile data; the full grouping appears on the resume page.

Programming language

  • C++

Circuit simulation

  • Synopsys HSPICE

IC/EDA design tools

  • Synopsys Custom Compiler
  • Cadence Virtuoso